{"id":398409,"date":"2024-10-20T04:35:46","date_gmt":"2024-10-20T04:35:46","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-802-3bq-2016-2\/"},"modified":"2024-10-26T08:24:02","modified_gmt":"2024-10-26T08:24:02","slug":"ieee-802-3bq-2016-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-802-3bq-2016-2\/","title":{"rendered":"IEEE 802.3bq-2016"},"content":{"rendered":"

Amendment Standard – Superseded. This amendment to IEEE Std 802.3-2015 specifies new Physical Coding Sublayer (PCS) interfaces and new Physical Medium Attachment (PMA) sublayer interfaces for 25 Gb\/s Ethernet and 40 Gb\/s Ethernet. 25GBASE-T and 40GBASE-T specify LAN interconnects for up to 30 m of balanced twisted-pair structured cabling, for 25 Gb\/s and 40 Gb\/s, respectively.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nIEEE Std 8023bq-2016 Front cover <\/td>\n<\/tr>\n
2<\/td>\nTitle page <\/td>\n<\/tr>\n
4<\/td>\nImportant Notices and Disclaimers Concerning IEEE Standards Documents <\/td>\n<\/tr>\n
7<\/td>\nParticipants <\/td>\n<\/tr>\n
11<\/td>\nIntroduction <\/td>\n<\/tr>\n
14<\/td>\nContents <\/td>\n<\/tr>\n
24<\/td>\nIMPORTANT NOTICE <\/td>\n<\/tr>\n
25<\/td>\n1. Introduction
1.3 Normative references
1.4 Definitions <\/td>\n<\/tr>\n
26<\/td>\n1.5 Abbreviations <\/td>\n<\/tr>\n
27<\/td>\n28. Physical Layer link signaling for Auto-Negotiation on twisted pair
28.3 State diagrams and variable definitions
28.3.1 State diagram variables
28.3.2 State diagram timers
28.5 Protocol implementation conformance statement (PICS) proforma for Clause 28, Physical Layer link signaling for Auto-Negotiation on twisted pair
28.5.3 Major capabilities\/options <\/td>\n<\/tr>\n
28<\/td>\n28.5.4 PICS proforma tables for Physical Layer link signaling for Auto-Negotiation on twisted pair
28.5.4.8 State diagrams <\/td>\n<\/tr>\n
29<\/td>\n30. Management
30.2 Managed objects
30.2.5 Capabilities
30.3 Layer management for DTEs
30.3.2 PHY device managed object class
30.3.2.1 PHY device attributes
30.3.2.1.2 aPhyType <\/td>\n<\/tr>\n
30<\/td>\n30.3.2.1.3 aPhyTypeList
30.5 Layer management for medium attachment units (MAUs)
30.5.1 MAU managed object class
30.5.1.1 MAU attributes
30.5.1.1.2 aMAUType
30.5.1.1.4 aMediaAvailable
30.5.1.1.19 aSNROpMarginChnlA <\/td>\n<\/tr>\n
31<\/td>\n30.5.1.1.20 aSNROpMarginChnlB
30.5.1.1.21 aSNROpMarginChnlC
30.5.1.1.22 aSNROpMarginChnlD <\/td>\n<\/tr>\n
32<\/td>\n30.5.1.1.24 aLDFastRetrainCount
30.5.1.1.25 aLPFastRetrainCount
30.6 Management for link Auto-Negotiation
30.6.1 Auto-Negotiation managed object class
30.6.1.1 Auto-Negotiation attributes
30.6.1.1.5 aAutoNegLocalTechnologyAbility <\/td>\n<\/tr>\n
33<\/td>\n45. Management Data Input\/Output (MDIO) Interface
45.2 MDIO Interface Registers
45.2.1 PMA\/PMD registers <\/td>\n<\/tr>\n
34<\/td>\n45.2.1.6 PMA\/PMD control 2 register (Register 1.7)
45.2.1.7 PMA\/PMD status 2 register (Register 1.8)
45.2.1.7.4 Transmit fault (1.8.11)
45.2.1.7.5 Receive fault (1.8.10) <\/td>\n<\/tr>\n
35<\/td>\n45.2.1.8 PMD transmit disable register (Register 1.9)
45.2.1.12 40G\/100G PMA\/PMD extended ability register (Register 1.13)
45.2.1.9a 40GBASE-T ability (1.13.6) <\/td>\n<\/tr>\n
36<\/td>\n45.2.1.14b 25G PMA\/PMD extended ability register (Register 1.19)
45.2.1.14b.a 25GBASE-T ability (1.19.5)
45.2.1.62 10MultiGBASE-T status (Register 1.129)
45.2.1.62.1 LP information valid (1.129.0)
45.2.1.63 10MultiGBASE-T pair swap and polarity register (Register 1.130) <\/td>\n<\/tr>\n
37<\/td>\n45.2.1.64 10MultiGBASE-T TX power backoff and PHY short reach setting (Register 1.131)
45.2.1.64.1 10MultiGBASE-T TX power backoff settings (1.131.15:10)
45.2.1.64.2 PHY short reach mode (1.131.0)
45.2.1.65 10MultiGBASE-T test mode register (Register 1.132) <\/td>\n<\/tr>\n
38<\/td>\n45.2.1.65.1 Test mode control (1.132.15:13)
45.2.1.65.2 Transmitter test frequencies (1.132.12:10)
45.2.1.66 SNR operating margin channel A register (Register 1.133)
45.2.1.67 SNR operating margin channel B register (Register 1.134)
45.2.1.68 SNR operating margin channel C register (Register 1.135)
45.2.1.69 SNR operating margin channel D register (Register 1.136) <\/td>\n<\/tr>\n
39<\/td>\n45.2.1.74 RX signal power channel A register (Register 1.141)
45.2.1.75 RX signal power channel B register (Register 1.142)
45.2.1.76 RX signal power channel C register (Register 1.143)
45.2.1.77 RX signal power channel D register (Register 1.144)
45.2.1.78 10MultiGBASE-T skew delay register (Registers 1.145 and 1.146) <\/td>\n<\/tr>\n
40<\/td>\n45.2.1.79 10MultiGBASE-T fast retrain status and control register (Register 1.147)
45.2.1.79.1 LP fast retrain count (1.147.15:11)
45.2.1.79.2 LD fast retrain count (1.147.10:6)
45.2.1.79.5 Fast retrain signal type (1.147.2:1)
45.2.1.79.6 Fast retrain enable (1.147.0) <\/td>\n<\/tr>\n
41<\/td>\n45.2.3 PCS registers
45.2.3.1 PCS control 1 register (Register 3.0)
45.2.3.1.2 Loopback (3.0.14)
45.2.3.2 PCS status 1 register (Register 3.1)
45.2.3.2.7 PCS receive link status (3.1.2) <\/td>\n<\/tr>\n
42<\/td>\n45.2.3.6 PCS control 2 register (Register 3.7)
45.2.3.6.1 PCS type selection (3.7.23:0) <\/td>\n<\/tr>\n
43<\/td>\n45.2.3.7 PCS status 2 register (Register 3.8)
45.2.3.7.3aa 25GBASE-T capable (3.8.9)
45.2.3.7.3b 40GBASE-T capable (3.8.6)
45.2.3.9 EEE control and capability 1 (Register 3.20) <\/td>\n<\/tr>\n
44<\/td>\n45.2.3.9.4a 40GBASE-T EEE supported (3.20.7)
45.2.3.9a EEE control and capability 2 (Register 3.21)
45.2.3.9a.1 25GBASE-T EEE supported (3.21.2)
45.2.3.13 BASE-R and 10MultiGBASE-T PCS status 1 register (Register 3.32) <\/td>\n<\/tr>\n
45<\/td>\n45.2.3.13.1 BASE-R and 10MultiGBASE-T receive link status (3.32.12)
45.2.3.13.4 BASE-R and 10MultiGBASE-T PCS high BER (3.32.1) <\/td>\n<\/tr>\n
46<\/td>\n45.2.3.13.5 BASE-R and 10MultiGBASE-T block lock (3.32.0)
45.2.3.14 BASE-R and 10MultiGBASE-T PCS status 2 register (Register 3.33)
45.2.3.14.1 Latched block lock (3.33.15) <\/td>\n<\/tr>\n
47<\/td>\n45.2.3.14.2 Latched high BER (3.33.14)
45.2.3.14.3 BER (3.33.13:8)
45.2.3.14.4 Errored blocks (3.33.7:0)
45.2.7 Auto-Negotiation registers <\/td>\n<\/tr>\n
48<\/td>\n45.2.7.10 10MultiGBASE-T AN control 1 register (Register 7.32) <\/td>\n<\/tr>\n
49<\/td>\n45.2.7.10.4a 40GBASE-T capability (7.32.11)
45.2.7.10.4b 25GBASE-T capability (7.32.10)
45.2.7.10.4c 25GBASE-T Fast retrain ability (7.32.9)
45.2.7.10.4d 40GBASE-T Fast retrain ability (7.32.3)
45.2.7.10.5 10GBASE-T LD PMA training reset request (7.32.2) <\/td>\n<\/tr>\n
50<\/td>\n45.2.7.10.6 10GBASE-T Fast retrain ability (7.32.1)
45.2.7.10.7 10GBASE-T LD loop timing ability (7.32.0)
45.2.7.11 10MultiGBASE-T AN status 1 register (Register 7.33)
45.2.7.11.1 MASTER-SLAVE configuration fault (7.33.15) <\/td>\n<\/tr>\n
51<\/td>\n45.2.7.11.2 MASTER-SLAVE configuration resolution (7.33.14)
45.2.7.11.7 10GBASE-T Link partner PMA training reset request (7.33.9)
45.2.7.11.7a Link partner 40GBASE-T capability (7.33.8)
45.2.7.11.7b Link partner 25GBASE-T capability (7.33.7)
45.2.7.11.7c 25GBASE-T Fast retrain ability (7.33.2) <\/td>\n<\/tr>\n
52<\/td>\n45.2.7.11.8 10GBASE-T Fast retrain ability (7.33.1)
45.2.7.11.9 40GBASE-T Fast retrain ability (7.33.0)
45.2.7.13 EEE advertisement (Register 7.60) <\/td>\n<\/tr>\n
53<\/td>\n45.2.7.13.4a 40GBASE-T EEE supported (7.60.9)
45.2.7.13.12a 25GBASE-T EEE supported (7.60.0)
45.2.7.14 EEE link partner ability (Register 7.61)
45.2.7.14a MultiGBASE-T AN control 2 (Register 7.64) <\/td>\n<\/tr>\n
54<\/td>\n45.2.7.14a.1 25GBASE-T THP Bypass Request
45.2.7.14a.2 40GBASE-T THP Bypass Request
45.2.7.14b MultiGBASE-T AN status 2 (Register 7.65) <\/td>\n<\/tr>\n
55<\/td>\n45.2.7.14b.1 25GBASE-T Link Partner THP Bypass Request
45.2.7.14b.2 40GBASE-T Link Partner THP Bypass Request <\/td>\n<\/tr>\n
56<\/td>\n45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, Management Data Input\/Output (MDIO) interface
45.5.3 PICS proforma tables for the Management Data Input Output (MDIO) interface
45.5.3.2 PMA\/PMD MMD options
45.5.3.3 PMA\/PMD Management functions
45.5.3.6 PCS options <\/td>\n<\/tr>\n
57<\/td>\n45.5.3.7 PCS management functions
45.5.3.8 Auto-Negotiation options <\/td>\n<\/tr>\n
58<\/td>\n45.5.3.9 Auto-Negotiation management functions <\/td>\n<\/tr>\n
59<\/td>\n55. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T
55.3.4 PMA training side-stream scrambler polynomials
55.6 Management interfaces
55.6.1.2 10GBASE-T Auto-Negotiation page use
55.6.2 MASTER-SLAVE configuration resolution <\/td>\n<\/tr>\n
60<\/td>\n55.12.3 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n
61<\/td>\n78. Energy-Efficient Ethernet (EEE)
78.1 Overview
78.1.3 Reconciliation sublayer operation
78.1.3.3.1 PHY LPI transmit operation
78.1.4 PHY types optionally supporting EEE
78.2 LPI mode timing parameters description <\/td>\n<\/tr>\n
62<\/td>\n78.3 Capabilities Negotiation
78.5 Communication link access latency <\/td>\n<\/tr>\n
63<\/td>\n80. Introduction to 40 Gb\/s and 100 Gb\/s networks
80.1 Overview
80.1.3 Relationship of 40 Gigabit and 100 Gigabit Ethernet to the ISO OSI reference model
80.1.4 Nomenclature <\/td>\n<\/tr>\n
64<\/td>\n80.1.5 Physical Layer signaling systems <\/td>\n<\/tr>\n
65<\/td>\n80.4 Delay Constraints <\/td>\n<\/tr>\n
66<\/td>\n81. Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation (XLGMII and CGMII)
81.1 Overview
81.1.7.3 Mapping of PLS_CARRIER.indication <\/td>\n<\/tr>\n
67<\/td>\n81.3.4 Link fault signaling
81.3.4.1 Variables and counters <\/td>\n<\/tr>\n
68<\/td>\n81.3.4.2 State diagram <\/td>\n<\/tr>\n
69<\/td>\n81.5 Protocol implementation conformance statement (PICS) proforma for Clause 81, Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation
81.5.3.7 Link Interruption <\/td>\n<\/tr>\n
70<\/td>\n105. Introduction to 25 Gb\/s networks
105.1 Overview
105.1.1 Scope
105.1.2 Relationship of 25 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n
71<\/td>\n105.1.3 Nomenclature
105.2 Physical Layer signaling systems <\/td>\n<\/tr>\n
72<\/td>\n105.3 Summary of 25 Gigabit Ethernet sublayers
105.3.1 Reconciliation Sublayer (RS) and 25 Gigabit Media Independent Interface (25GMII)
105.3.6 Auto-Negotiation (AN)
105.5 Delay constraints <\/td>\n<\/tr>\n
73<\/td>\n113. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 25GBASE-T and 40GBASE-T
113.1 Overview
113.1.1 Nomenclature <\/td>\n<\/tr>\n
74<\/td>\n113.1.2 Relationship of 25GBASE-T and 40GBASE-T to other standards
113.1.3 Operation of 25GBASE-T and 40GBASE-T <\/td>\n<\/tr>\n
78<\/td>\n113.1.3.1 Summary of Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n
79<\/td>\n113.1.3.2 Summary of Physical Medium Attachment (PMA) sublayer
113.1.3.3 Summary of EEE capability <\/td>\n<\/tr>\n
80<\/td>\n113.1.4 Signaling <\/td>\n<\/tr>\n
81<\/td>\n113.1.5 Interfaces
113.1.6 Conventions in this clause
113.2 25GBASE-T and 40GBASE-T service primitives and interfaces <\/td>\n<\/tr>\n
82<\/td>\n113.2.1 Technology Dependent Interface
113.2.1.1 PMA_LINK.request
113.2.1.1.1 Semantics of the primitive
113.2.1.1.2 When generated
113.2.1.1.3 Effect of receipt
113.2.1.2 PMA_LINK.indication
113.2.1.2.1 Semantics of the primitive <\/td>\n<\/tr>\n
83<\/td>\n113.2.1.2.2 When generated
113.2.1.2.3 Effect of receipt
113.2.2 PMA service interface <\/td>\n<\/tr>\n
84<\/td>\n113.2.2.1 PMA_TXMODE.indication
113.2.2.1.1 Semantics of the primitive <\/td>\n<\/tr>\n
85<\/td>\n113.2.2.1.2 When generated
113.2.2.1.3 Effect of receipt
113.2.2.2 PMA_CONFIG.indication
113.2.2.2.1 Semantics of the primitive
113.2.2.2.2 When generated
113.2.2.2.3 Effect of receipt
113.2.2.3 PMA_UNITDATA.request <\/td>\n<\/tr>\n
86<\/td>\n113.2.2.3.1 Semantics of the primitive
113.2.2.3.2 When generated
113.2.2.3.3 Effect of receipt
113.2.2.4 PMA_UNITDATA.indication
113.2.2.4.1 Semantics of the primitive <\/td>\n<\/tr>\n
87<\/td>\n113.2.2.4.2 When generated
113.2.2.4.3 Effect of receipt
113.2.2.5 PMA_SCRSTATUS.request
113.2.2.5.1 Semantics of the primitive
113.2.2.5.2 When generated
113.2.2.5.3 Effect of receipt
113.2.2.6 PMA_PCSSTATUS.request
113.2.2.6.1 Semantics of the primitive
113.2.2.6.2 When generated <\/td>\n<\/tr>\n
88<\/td>\n113.2.2.6.3 Effect of receipt
113.2.2.7 PMA_RXSTATUS.indication
113.2.2.7.1 Semantics of the primitive
113.2.2.7.2 When generated
113.2.2.7.3 Effect of receipt
113.2.2.8 PMA_REMRXSTATUS.request
113.2.2.8.1 Semantics of the primitive
113.2.2.8.2 When generated <\/td>\n<\/tr>\n
89<\/td>\n113.2.2.8.3 Effect of receipt
113.2.2.9 PMA_ALERTDETECT.indication
113.2.2.9.1 Semantics of the primitive
113.2.2.9.2 When generated
113.2.2.9.3 Effect of receipt
113.2.2.10 PCS_RX_LPI_STATUS.request
113.2.2.10.1 Semantics of the primitive
113.2.2.10.2 When generated
113.2.2.10.3 Effect of receipt <\/td>\n<\/tr>\n
90<\/td>\n113.2.2.11 PMA_PCSDATAMODE.indication
113.2.2.11.1 Semantics of the primitive
113.2.2.11.2 When generated
113.2.2.11.3 Effect of receipt
113.2.2.12 PMA_FR_ACTIVE.indication
113.2.2.12.1 Semantics of the primitive
113.2.2.12.2 When generated
113.2.2.12.3 Effect of receipt
113.3 Physical Coding Sublayer (PCS)
113.3.1 PCS service interface (25GMII\/XLGMII) <\/td>\n<\/tr>\n
91<\/td>\n113.3.2 PCS functions <\/td>\n<\/tr>\n
92<\/td>\n113.3.2.1 PCS Reset function
113.3.2.2 PCS Transmit function <\/td>\n<\/tr>\n
93<\/td>\n113.3.2.2.1 Use of blocks
113.3.2.2.2 65B-LDPC transmission code
113.3.2.2.3 Notation conventions <\/td>\n<\/tr>\n
96<\/td>\n113.3.2.2.4 Transmission order
113.3.2.2.5 Block structure
113.3.2.2.6 Control codes <\/td>\n<\/tr>\n
101<\/td>\n113.3.2.2.7 Ordered sets
113.3.2.2.8 Idle (\/I\/)
113.3.2.2.9 LPI (\/LI\/)
113.3.2.2.10 Start (\/S\/) <\/td>\n<\/tr>\n
102<\/td>\n113.3.2.2.11 Terminate (\/T\/)
113.3.2.2.12 ordered set (\/O\/)
113.3.2.2.13 Error (\/E\/)
113.3.2.2.14 Transmit process
113.3.2.2.15 64B\/65B to 512B\/513B Transcoder <\/td>\n<\/tr>\n
105<\/td>\n113.3.2.2.16 Aggregation
113.3.2.2.17 PCS Scrambler <\/td>\n<\/tr>\n
107<\/td>\n113.3.2.2.18 LDPC framing and LDPC encoder
113.3.2.2.19 Reed Solomon encoder <\/td>\n<\/tr>\n
108<\/td>\n113.3.2.2.20 DSQ128 bit mapping <\/td>\n<\/tr>\n
110<\/td>\n113.3.2.2.21 DSQ128 to 4D-PAM16
113.3.2.2.22 Block-LDPC framer
113.3.2.2.23 EEE capability <\/td>\n<\/tr>\n
111<\/td>\n113.3.2.3 PCS Receive function <\/td>\n<\/tr>\n
112<\/td>\n113.3.2.3.1 Frame and block synchronization <\/td>\n<\/tr>\n
113<\/td>\n113.3.2.3.2 PCS descrambler
113.3.2.3.3 Invalid blocks
113.3.3 Test-pattern generators <\/td>\n<\/tr>\n
114<\/td>\n113.3.4 PMA training side-stream scrambler polynomials
113.3.4.1 Generation of bits San, Sbn, Scn, Sdn
113.3.4.2 Generation of 4D symbols TAn, TBn, TCn, TDn
113.3.4.3 PMA training mode descrambler polynomials <\/td>\n<\/tr>\n
115<\/td>\n113.3.5 LPI signaling <\/td>\n<\/tr>\n
116<\/td>\n113.3.5.1 LPI Synchronization <\/td>\n<\/tr>\n
117<\/td>\n113.3.5.2 Quiet period signaling
113.3.5.3 Refresh period signaling <\/td>\n<\/tr>\n
118<\/td>\n113.3.6 Detailed functions and state diagrams
113.3.6.1 State diagram conventions
113.3.6.2 State diagram parameters
113.3.6.2.1 Constants <\/td>\n<\/tr>\n
119<\/td>\n113.3.6.2.2 Variables <\/td>\n<\/tr>\n
121<\/td>\n113.3.6.2.3 Timers
113.3.6.2.4 Functions <\/td>\n<\/tr>\n
123<\/td>\n113.3.6.2.5 Counters <\/td>\n<\/tr>\n
124<\/td>\n113.3.6.3 State diagrams
113.3.7 PCS management
113.3.7.1 Status <\/td>\n<\/tr>\n
125<\/td>\n113.3.7.2 Counters <\/td>\n<\/tr>\n
131<\/td>\n113.3.7.3 Loopback
113.4 Physical Medium Attachment (PMA) sublayer
113.4.1 PMA functional specifications <\/td>\n<\/tr>\n
132<\/td>\n113.4.2 PMA functions
113.4.2.1 PMA Reset function
113.4.2.2 PMA Transmit function
113.4.2.2.1 Alert signal <\/td>\n<\/tr>\n
134<\/td>\n113.4.2.2.2 Link failure signal
113.4.2.3 PMA transmit disable function
113.4.2.3.1 Global PMA transmit disable function
113.4.2.3.2 PMA pair by pair transmit disable function
113.4.2.3.3 PMA MDIO function mapping <\/td>\n<\/tr>\n
135<\/td>\n113.4.2.4 PMA Receive function <\/td>\n<\/tr>\n
136<\/td>\n113.4.2.5 PHY Control function <\/td>\n<\/tr>\n
137<\/td>\n113.4.2.5.1 Infofield notation
113.4.2.5.2 Start of Frame Delimiter
113.4.2.5.3 Current transmitter settings <\/td>\n<\/tr>\n
138<\/td>\n113.4.2.5.4 Next transmitter settings
113.4.2.5.5 Requested transmitter settings
113.4.2.5.6 Message Field <\/td>\n<\/tr>\n
139<\/td>\n113.4.2.5.7 SNR_margin <\/td>\n<\/tr>\n
140<\/td>\n113.4.2.5.8 Transition counter
113.4.2.5.9 Coefficient exchange handshake
113.4.2.5.10 Ability Fields
113.4.2.5.11 Reserved fields
113.4.2.5.12 Vendor-specific field <\/td>\n<\/tr>\n
141<\/td>\n113.4.2.5.13 Coefficient Field
113.4.2.5.14 CRC16
113.4.2.5.15 Startup sequence <\/td>\n<\/tr>\n
144<\/td>\n113.4.2.5.16 Fast retrain function <\/td>\n<\/tr>\n
145<\/td>\n113.4.2.6 Link Monitor function
113.4.2.7 Refresh Monitor function
113.4.2.8 Clock Recovery function
113.4.3 MDI
113.4.3.1 MDI signals transmitted by the PHY <\/td>\n<\/tr>\n
146<\/td>\n113.4.3.2 Signals received at the MDI <\/td>\n<\/tr>\n
147<\/td>\n113.4.4 Automatic MDI\/MDI-X configuration
113.4.5 State variables
113.4.5.1 State diagram variables <\/td>\n<\/tr>\n
150<\/td>\n113.4.5.2 Timers <\/td>\n<\/tr>\n
151<\/td>\n113.4.5.3 Functions
113.4.5.4 Counters <\/td>\n<\/tr>\n
152<\/td>\n113.4.6 State diagrams
113.4.6.1 PHY Control state diagram <\/td>\n<\/tr>\n
153<\/td>\n113.4.6.2 Transition counter state diagrams <\/td>\n<\/tr>\n
155<\/td>\n113.4.6.3 Link Monitor state diagram <\/td>\n<\/tr>\n
156<\/td>\n113.4.6.4 EEE Refresh monitor state diagram <\/td>\n<\/tr>\n
157<\/td>\n113.4.6.5 Fast retrain state diagram
113.5 PMA electrical specifications
113.5.1 Isolation requirement
113.5.2 Test modes <\/td>\n<\/tr>\n
160<\/td>\n113.5.2.1 Test fixtures <\/td>\n<\/tr>\n
161<\/td>\n113.5.3 Transmitter electrical specifications
113.5.3.1 Maximum output droop
113.5.3.2 Transmitter nonlinear distortion <\/td>\n<\/tr>\n
162<\/td>\n113.5.3.3 Transmitter timing jitter
113.5.3.4 Transmitter power spectral density (PSD) and power level <\/td>\n<\/tr>\n
163<\/td>\n113.5.3.5 Transmit clock frequency
113.5.4 Receiver electrical specifications
113.5.4.1 Receiver differential input signals <\/td>\n<\/tr>\n
164<\/td>\n113.5.4.2 Receiver frequency tolerance
113.5.4.3 Rejection of External EM Fields
113.5.4.4 Alien crosstalk noise rejection <\/td>\n<\/tr>\n
165<\/td>\n113.5.4.5 Short reach mode
113.6 Management interfaces
113.6.1 Support for Auto-Negotiation <\/td>\n<\/tr>\n
166<\/td>\n113.6.1.1 25G\/40GBASE-T use of registers during Auto-Negotiation
113.6.1.2 25G\/40GBASE-T Auto-Negotiation page use
113.6.1.3 Sending Next Pages <\/td>\n<\/tr>\n
168<\/td>\n113.6.2 MASTER-SLAVE configuration resolution <\/td>\n<\/tr>\n
170<\/td>\n113.7 Link segment characteristics <\/td>\n<\/tr>\n
171<\/td>\n113.7.1 Cabling system characteristics
113.7.2 Link segment transmission parameters
113.7.2.1 Insertion loss <\/td>\n<\/tr>\n
172<\/td>\n113.7.2.2 Differential characteristic impedance
113.7.2.3 Return loss
113.7.2.4 Coupling parameters between duplex channels comprising one link segment
113.7.2.4.1 Differential near-end crosstalk <\/td>\n<\/tr>\n
173<\/td>\n113.7.2.4.2 Multiple disturber near-end crosstalk (MDNEXT) loss <\/td>\n<\/tr>\n
174<\/td>\n113.7.2.4.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss <\/td>\n<\/tr>\n
175<\/td>\n113.7.2.4.4 Attenuation to crosstalk ratio, far end (ACRF)
113.7.2.4.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF) <\/td>\n<\/tr>\n
176<\/td>\n113.7.2.4.6 Multiple disturber power sum attenuation to crosstalk ratio, far-end (PS-ACRF)
113.7.2.5 Maximum link delay
113.7.2.6 Link delay skew
113.7.3 Coupling parameters between link segments <\/td>\n<\/tr>\n
177<\/td>\n113.7.3.1 Multiple disturber alien near-end crosstalk (MDANEXT) loss
113.7.3.1.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
113.7.3.2 Multiple disturber alien far-end crosstalk (MDAFEXT) loss <\/td>\n<\/tr>\n
178<\/td>\n113.7.3.2.1 Multiple disturber power sum alien attenuation to crosstalk, far end crosstalk (PSAACRF)
113.7.4 Direct attach cable assembly\u2014Short Reach Mode
113.7.4.1 Insertion loss <\/td>\n<\/tr>\n
179<\/td>\n113.7.4.2 Return loss
113.7.4.3 Coupling parameters between direct attach cable assembly duplex channels comprising one link segment
113.7.4.3.1 Differential near-end crosstalk <\/td>\n<\/tr>\n
180<\/td>\n113.7.4.3.2 Multiple disturber near-end crosstalk (MDNEXT) loss
113.7.4.3.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss
113.7.4.3.4 Attenuation to crosstalk ratio, far end (ACRF) <\/td>\n<\/tr>\n
181<\/td>\n113.7.4.3.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF)
113.7.4.3.6 Maximum link delay
113.7.4.3.7 Link delay skew
113.7.4.3.8 Multiple disturber alien near-end crosstalk (MDANEXT) loss
113.7.4.3.9 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss <\/td>\n<\/tr>\n
182<\/td>\n113.7.4.3.10 Multiple disturber power sum alien attenuation to crosstalk, far end crosstalk (PSAACRF) <\/td>\n<\/tr>\n
183<\/td>\n113.7.5 Noise environment
113.8 MDI specification
113.8.1 MDI connectors
113.8.2 MDI electrical specifications <\/td>\n<\/tr>\n
185<\/td>\n113.8.2.1 MDI return loss
113.8.2.2 MDI impedance balance <\/td>\n<\/tr>\n
186<\/td>\n113.8.2.3 MDI fault tolerance
113.9 Environmental specifications
113.9.1 General safety
113.9.2 Network safety <\/td>\n<\/tr>\n
187<\/td>\n113.9.3 Installation and maintenance guidelines
113.9.4 Telephone voltages
113.9.5 Electromagnetic compatibility
113.9.6 Temperature and humidity
113.10 PHY labeling
113.11 Delay constraints <\/td>\n<\/tr>\n
189<\/td>\n113.12 Protocol implementation conformance statement (PICS) proforma for Clause 113, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 25GBASE-T and 40GBASE-T
113.12.1 Identification
113.12.1.1 Implementation identification
113.12.1.2 Protocol summary <\/td>\n<\/tr>\n
190<\/td>\n113.12.2 Major capabilities\/options
113.12.3 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n
192<\/td>\n113.12.3.1 PCS Receive functions
113.12.3.2 Other PCS functions
113.12.4 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n
195<\/td>\n113.12.5 Management interface <\/td>\n<\/tr>\n
196<\/td>\n113.12.6 PMA Electrical Specifications <\/td>\n<\/tr>\n
198<\/td>\n113.12.7 Characteristics of the link segment
113.12.8 Characteristics of the direct attach cable assembly <\/td>\n<\/tr>\n
199<\/td>\n113.12.9 MDI requirements
113.12.10 General safety and environmental requirements <\/td>\n<\/tr>\n
200<\/td>\n113.12.11 Timing requirements <\/td>\n<\/tr>\n
201<\/td>\nAnnex 28B (normative) IEEE 802.3 Selector Base Page definition
28B.3 Priority resolution <\/td>\n<\/tr>\n
202<\/td>\nAnnex 28C (normative) Next Page Message Code field definitions
28C.11 Message code 9\u201410MultiGBASE-T and 1000BASE-T technology message code <\/td>\n<\/tr>\n
203<\/td>\nAnnex 28D (normative) Description of extensions to Clause 28 and associated annexes
28D.8 Extensions required for Clause 113 (25GBASE-T and 40GBASE-T) <\/td>\n<\/tr>\n
204<\/td>\nAnnex 113A (informative) Description of cable clamp and test setup
113A.1 Overview
113A.2 Description of cable clamp <\/td>\n<\/tr>\n
206<\/td>\n113A.3 Cable clamp measurement, calibration, and validation <\/td>\n<\/tr>\n
209<\/td>\n113A.4 Test setup <\/td>\n<\/tr>\n
210<\/td>\nAnnex A (informative) Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard for Ethernet Amendment 3: Physical Layer and Management Parameters for 25 Gb\/s and 40 Gb\/s Operation, Types 25GBASE-T and 40GBASE-T<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n2016<\/td>\n211<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":398415,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-398409","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/398409","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/398415"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=398409"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=398409"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=398409"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}