{"id":446789,"date":"2024-10-20T08:48:34","date_gmt":"2024-10-20T08:48:34","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-iec-62530-22023\/"},"modified":"2024-10-26T16:24:54","modified_gmt":"2024-10-26T16:24:54","slug":"bs-iec-62530-22023","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-iec-62530-22023\/","title":{"rendered":"BS IEC 62530-2:2023"},"content":{"rendered":"

PDF Catalog<\/h4>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
2<\/td>\nundefined <\/td>\n<\/tr>\n
4<\/td>\nContents <\/td>\n<\/tr>\n
15<\/td>\nIntroduction <\/td>\n<\/tr>\n
16<\/td>\n1. Overview
1.1 Scope
1.2 Purpose
1.3 Word usage <\/td>\n<\/tr>\n
17<\/td>\n1.4 Conventions used
1.4.1 Visual cues (meta-syntax)
1.4.2 Return values
1.4.3 Inheritance <\/td>\n<\/tr>\n
18<\/td>\n1.4.4 Operation order on equivalent data objects
1.4.5 uvm_pkg
1.4.6 Random stability <\/td>\n<\/tr>\n
19<\/td>\n2. Normative references
3. Definitions, acronyms, and abbreviations
3.1 Definitions <\/td>\n<\/tr>\n
20<\/td>\n3.2 Acronyms and abbreviations <\/td>\n<\/tr>\n
21<\/td>\n4. Universal Verification Methodology (UVM) class reference <\/td>\n<\/tr>\n
22<\/td>\n5. Base classes
5.1 Overview
5.2 uvm_void <\/td>\n<\/tr>\n
23<\/td>\n5.3 uvm_object
5.3.1 Class declaration
5.3.2 Common methods
5.3.3 Seeding
5.3.4 Identification <\/td>\n<\/tr>\n
25<\/td>\n5.3.5 Creation
5.3.6 Printing <\/td>\n<\/tr>\n
26<\/td>\n5.3.7 Recording <\/td>\n<\/tr>\n
27<\/td>\n5.3.8 Copying
5.3.9 Comparing <\/td>\n<\/tr>\n
28<\/td>\n5.3.10 Packing <\/td>\n<\/tr>\n
29<\/td>\n5.3.11 Unpacking <\/td>\n<\/tr>\n
30<\/td>\n5.3.12 Configuration
5.3.13 Field operations
5.3.14 Active policy <\/td>\n<\/tr>\n
31<\/td>\n5.4 uvm_transaction
5.4.1 Class declaration
5.4.2 Methods <\/td>\n<\/tr>\n
35<\/td>\n5.5 uvm_port_base #(IF)
5.5.1 Class declaration
5.5.2 Methods <\/td>\n<\/tr>\n
38<\/td>\n5.6 uvm_time
5.6.1 Class declaration
5.6.2 Common methods <\/td>\n<\/tr>\n
40<\/td>\n5.7 uvm_field_op
5.7.1 Class declaration
5.7.2 Methods <\/td>\n<\/tr>\n
42<\/td>\n6. Reporting classes
6.1 Overview <\/td>\n<\/tr>\n
43<\/td>\n6.2 uvm_report_message
6.2.1 Class declaration
6.2.2 Common methods
6.2.3 Infrastructure references <\/td>\n<\/tr>\n
44<\/td>\n6.2.4 Message fields <\/td>\n<\/tr>\n
45<\/td>\n6.3 uvm_report_object <\/td>\n<\/tr>\n
46<\/td>\n6.3.1 Class declaration
6.3.2 Common methods
6.3.3 Reporting <\/td>\n<\/tr>\n
48<\/td>\n6.3.4 Verbosity configuration <\/td>\n<\/tr>\n
49<\/td>\n6.3.5 Action configuration <\/td>\n<\/tr>\n
50<\/td>\n6.3.6 File configuration
6.3.7 Override configuration <\/td>\n<\/tr>\n
51<\/td>\n6.3.8 Report handler configuration
6.4 uvm_report_handler
6.4.1 Class declaration
6.4.2 Common methods
6.4.3 Verbosity configuration <\/td>\n<\/tr>\n
52<\/td>\n6.4.4 Action configuration <\/td>\n<\/tr>\n
53<\/td>\n6.4.5 File configuration
6.4.6 Override configuration <\/td>\n<\/tr>\n
54<\/td>\n6.4.7 Message processing
6.5 Report server
6.5.1 uvm_report_server <\/td>\n<\/tr>\n
57<\/td>\n6.5.2 uvm_default_report_server
6.6 uvm_report_catcher <\/td>\n<\/tr>\n
58<\/td>\n6.6.1 Class declaration
6.6.2 Common methods
6.6.3 Current message state <\/td>\n<\/tr>\n
60<\/td>\n6.6.4 Change message state
6.6.5 Callback interface <\/td>\n<\/tr>\n
61<\/td>\n6.6.6 Reporting <\/td>\n<\/tr>\n
62<\/td>\n7. Recording classes <\/td>\n<\/tr>\n
63<\/td>\n7.1 uvm_tr_database
7.1.1 Class declaration
7.1.2 Common methods
7.1.3 Database API
7.1.4 Stream API <\/td>\n<\/tr>\n
64<\/td>\n7.1.5 Link API
7.1.6 Implementation agnostic API <\/td>\n<\/tr>\n
65<\/td>\n7.2 uvm_tr_stream
7.2.1 Class declaration
7.2.2 Common methods
7.2.3 Introspection API <\/td>\n<\/tr>\n
66<\/td>\n7.2.4 Stream API <\/td>\n<\/tr>\n
67<\/td>\n7.2.5 Transaction recorder API
7.2.6 Handles <\/td>\n<\/tr>\n
68<\/td>\n7.2.7 Implementation agnostic API <\/td>\n<\/tr>\n
69<\/td>\n7.3 UVM links
7.3.1 uvm_link_base <\/td>\n<\/tr>\n
70<\/td>\n7.3.2 uvm_parent_child_link <\/td>\n<\/tr>\n
71<\/td>\n7.3.3 uvm_cause_effect_link <\/td>\n<\/tr>\n
72<\/td>\n7.3.4 uvm_related_link <\/td>\n<\/tr>\n
73<\/td>\n8. Factory classes
8.1 Overview
8.2 Factory component and object wrappers
8.2.1 Introduction
8.2.2 type_id <\/td>\n<\/tr>\n
74<\/td>\n8.2.3 uvm_component_registry #(T,Tname) <\/td>\n<\/tr>\n
75<\/td>\n8.2.4 uvm_object_registry #(T,Tname) <\/td>\n<\/tr>\n
77<\/td>\n8.2.5 Abstract registries <\/td>\n<\/tr>\n
79<\/td>\n8.3 UVM factory
8.3.1 uvm_factory <\/td>\n<\/tr>\n
84<\/td>\n8.3.2 uvm_object_wrapper <\/td>\n<\/tr>\n
85<\/td>\n8.3.3 uvm_default_factory
9. Phasing
9.1 Overview
9.2 Implementation
9.2.1 Class hierarchy
9.2.2 Phasing related classes <\/td>\n<\/tr>\n
86<\/td>\n9.2.3 Common and run-time phases
9.3 Phasing definition classes
9.3.1 uvm_phase <\/td>\n<\/tr>\n
94<\/td>\n9.3.2 uvm_phase_state_change
9.3.3 uvm_phase_cb <\/td>\n<\/tr>\n
95<\/td>\n9.4 uvm_domain
9.4.1 Class declaration
9.4.2 Methods <\/td>\n<\/tr>\n
96<\/td>\n9.5 uvm_bottomup_phase
9.5.1 Class declaration
9.5.2 Methods
9.6 uvm_task_phase <\/td>\n<\/tr>\n
97<\/td>\n9.6.1 Class declaration
9.6.2 Methods
9.7 uvm_topdown_phase <\/td>\n<\/tr>\n
98<\/td>\n9.7.1 Class declaration
9.7.2 Methods
9.8 Predefined phases <\/td>\n<\/tr>\n
99<\/td>\n9.8.1 Common phases <\/td>\n<\/tr>\n
100<\/td>\n9.8.2 UVM run-time phases <\/td>\n<\/tr>\n
102<\/td>\n10. Synchronization classes
10.1 Event classes
10.1.1 uvm_event_base <\/td>\n<\/tr>\n
104<\/td>\n10.1.2 uvm_event#(t) <\/td>\n<\/tr>\n
105<\/td>\n10.2 uvm_event_callback
10.2.1 Class declaration
10.2.2 Methods <\/td>\n<\/tr>\n
106<\/td>\n10.3 uvm_barrier
10.3.1 Class declaration
10.3.2 Methods <\/td>\n<\/tr>\n
108<\/td>\n10.4 Pool classes
10.4.1 uvm_event_pool
10.4.2 uvm_barrier_pool <\/td>\n<\/tr>\n
109<\/td>\n10.5 Objection mechanism
10.5.1 uvm_objection <\/td>\n<\/tr>\n
113<\/td>\n10.5.2 uvm_objection_callback <\/td>\n<\/tr>\n
114<\/td>\n10.6 uvm_heartbeat
10.6.1 Class declaration
10.6.2 Methods <\/td>\n<\/tr>\n
116<\/td>\n10.7 Callbacks classes
10.7.1 uvm_callback
10.7.2 uvm_callbacks #(T,CB) <\/td>\n<\/tr>\n
119<\/td>\n11. Container classes
11.1 Overview <\/td>\n<\/tr>\n
120<\/td>\n11.2 uvm_pool #(KEY,T)
11.2.1 Class declaration
11.2.2 Methods <\/td>\n<\/tr>\n
122<\/td>\n11.3 uvm_queue #(T)
11.3.1 Class declaration
11.3.2 Methods <\/td>\n<\/tr>\n
124<\/td>\n12. UVM TLM interfaces
12.1 Overview
12.2 UVM TLM 1
12.2.1 General <\/td>\n<\/tr>\n
125<\/td>\n12.2.2 Unidirectional interfaces and ports
12.2.3 Bidirectional interfaces and ports <\/td>\n<\/tr>\n
126<\/td>\n12.2.4 uvm_tlm_if_base #(T1,T2) <\/td>\n<\/tr>\n
129<\/td>\n12.2.5 Port classes <\/td>\n<\/tr>\n
130<\/td>\n12.2.6 Export classes <\/td>\n<\/tr>\n
132<\/td>\n12.2.7 Implementation (imp) classes <\/td>\n<\/tr>\n
134<\/td>\n12.2.8 FIFO classes <\/td>\n<\/tr>\n
137<\/td>\n12.2.9 Channel classes <\/td>\n<\/tr>\n
140<\/td>\n12.2.10 Analysis ports <\/td>\n<\/tr>\n
142<\/td>\n12.3 UVM TLM 2
12.3.1 General
12.3.2 uvm_tlm_if: transport interfaces <\/td>\n<\/tr>\n
144<\/td>\n12.3.3 Enumerations
12.3.4 Generic payload and extensions <\/td>\n<\/tr>\n
155<\/td>\n12.3.5 Sockets <\/td>\n<\/tr>\n
161<\/td>\n12.3.6 Port classes <\/td>\n<\/tr>\n
162<\/td>\n12.3.7 Export classes
12.3.8 Implementation (imp) classes imps <\/td>\n<\/tr>\n
163<\/td>\n12.3.9 uvm_tlm_time
13. Predefined component classes
13.1 uvm_component <\/td>\n<\/tr>\n
164<\/td>\n13.1.1 Class declaration
13.1.2 Common methods <\/td>\n<\/tr>\n
165<\/td>\n13.1.3 Hierarchy interface <\/td>\n<\/tr>\n
166<\/td>\n13.1.4 Phasing interface <\/td>\n<\/tr>\n
171<\/td>\n13.1.5 Configuration interface
13.1.6 Objection interface <\/td>\n<\/tr>\n
172<\/td>\n13.1.7 Recording interface <\/td>\n<\/tr>\n
176<\/td>\n13.1.8 Other interfaces
13.2 uvm_test
13.2.1 Class declaration
13.2.2 Methods <\/td>\n<\/tr>\n
177<\/td>\n13.3 uvm_env
13.3.1 Class declaration
13.3.2 Methods
13.4 uvm_agent
13.4.1 Class declaration
13.4.2 Methods <\/td>\n<\/tr>\n
178<\/td>\n13.5 uvm_monitor
13.5.1 Class declaration
13.5.2 Methods
13.6 uvm_scoreboard
13.6.1 Class declaration
13.6.2 Methods <\/td>\n<\/tr>\n
179<\/td>\n13.7 uvm_driver #(REQ,RSP)
13.7.1 Class declaration
13.7.2 Ports
13.7.3 Methods
13.8 uvm_push_driver #(REQ,RSP) <\/td>\n<\/tr>\n
180<\/td>\n13.8.1 Class declaration
13.8.2 Ports
13.8.3 Methods
13.9 uvm_subscriber
13.9.1 Class declaration
13.9.2 Ports <\/td>\n<\/tr>\n
181<\/td>\n13.9.3 Methods
14. Sequence classes
14.1 uvm_sequence_item
14.1.1 Class declaration
14.1.2 Common fields <\/td>\n<\/tr>\n
183<\/td>\n14.1.3 Reporting interface <\/td>\n<\/tr>\n
185<\/td>\n14.2 uvm_sequence_base
14.2.1 Class declaration
14.2.2 Common methods <\/td>\n<\/tr>\n
186<\/td>\n14.2.3 Sequence execution <\/td>\n<\/tr>\n
187<\/td>\n14.2.4 Run-time phasing <\/td>\n<\/tr>\n
188<\/td>\n14.2.5 Sequence control <\/td>\n<\/tr>\n
190<\/td>\n14.2.6 Sequence item execution <\/td>\n<\/tr>\n
192<\/td>\n14.2.7 Response API <\/td>\n<\/tr>\n
193<\/td>\n14.3 uvm_sequence #(REQ,RSP)
14.3.1 Class declaration <\/td>\n<\/tr>\n
194<\/td>\n14.3.2 Variables
14.3.3 Methods <\/td>\n<\/tr>\n
195<\/td>\n14.4 uvm_sequence_library
14.4.1 Class declaration
14.4.2 Example
14.4.3 Common methods <\/td>\n<\/tr>\n
196<\/td>\n14.4.4 Sequence selection <\/td>\n<\/tr>\n
197<\/td>\n14.4.5 Sequence registration <\/td>\n<\/tr>\n
198<\/td>\n15. Sequencer classes
15.1 Overview
15.1.1 Sequencer variants
15.1.2 Sequence item ports <\/td>\n<\/tr>\n
199<\/td>\n15.2 Sequencer interface
15.2.1 uvm_sqr_if_base #(T1,T2) <\/td>\n<\/tr>\n
201<\/td>\n15.2.2 Sequence item pull ports
15.3 uvm_sequencer_base
15.3.1 Class declaration <\/td>\n<\/tr>\n
202<\/td>\n15.3.2 Methods <\/td>\n<\/tr>\n
206<\/td>\n15.3.3 Requests
15.3.4 Responses
15.3.5 Default sequence <\/td>\n<\/tr>\n
207<\/td>\n15.4 Common sequencer API
15.4.1 Method <\/td>\n<\/tr>\n
208<\/td>\n15.4.2 Request
15.4.3 Responses
15.5 uvm_sequencer #(REQ,RSP)
15.5.1 Class declaration
15.5.2 Methods <\/td>\n<\/tr>\n
211<\/td>\n15.6 uvm_push_sequencer #(REQ,RSP)
15.6.1 Class declaration
15.6.2 Ports
15.6.3 Methods <\/td>\n<\/tr>\n
212<\/td>\n16. Policy classes
16.1 uvm_policy <\/td>\n<\/tr>\n
213<\/td>\n16.1.1 Class declaration
16.1.2 Methods <\/td>\n<\/tr>\n
214<\/td>\n16.1.3 Active object
16.1.4 recursion_state_e <\/td>\n<\/tr>\n
215<\/td>\n16.2 uvm_printer
16.2.1 Class declaration
16.2.2 Methods
16.2.3 Methods for printer usage <\/td>\n<\/tr>\n
220<\/td>\n16.2.4 Methods for printer subtyping
16.2.5 Methods for printer configuration <\/td>\n<\/tr>\n
223<\/td>\n16.2.6 Methods for object print control <\/td>\n<\/tr>\n
224<\/td>\n16.2.7 Element stack <\/td>\n<\/tr>\n
225<\/td>\n16.2.8 uvm_printer_element <\/td>\n<\/tr>\n
226<\/td>\n16.2.9 uvm_printer_element_proxy <\/td>\n<\/tr>\n
227<\/td>\n16.2.10 uvm_table_printer <\/td>\n<\/tr>\n
228<\/td>\n16.2.11 uvm_tree_printer <\/td>\n<\/tr>\n
229<\/td>\n16.2.12 uvm_line_printer <\/td>\n<\/tr>\n
230<\/td>\n16.3 uvm_comparer
16.3.1 Class declaration
16.3.2 Methods <\/td>\n<\/tr>\n
231<\/td>\n16.3.3 Methods for comparer usage <\/td>\n<\/tr>\n
234<\/td>\n16.3.4 Methods for comparer configuration
16.3.5 Methods for comparer reporting control <\/td>\n<\/tr>\n
235<\/td>\n16.3.6 Methods for object compare control
16.4 uvm_recorder
16.4.1 Class declaration <\/td>\n<\/tr>\n
236<\/td>\n16.4.2 Methods for recorder configuration
16.4.3 Introspection API <\/td>\n<\/tr>\n
237<\/td>\n16.4.4 Transaction recorder API <\/td>\n<\/tr>\n
238<\/td>\n16.4.5 Handles
16.4.6 Attribute recording <\/td>\n<\/tr>\n
241<\/td>\n16.4.7 Implementation agnostic API <\/td>\n<\/tr>\n
244<\/td>\n16.5 uvm_packer
16.5.1 Class declaration
16.5.2 Methods <\/td>\n<\/tr>\n
245<\/td>\n16.5.3 Methods for packer subtyping
16.5.4 Packing and unpacking <\/td>\n<\/tr>\n
249<\/td>\n16.6 uvm_copier
16.6.1 Class declaration
16.6.2 Methods <\/td>\n<\/tr>\n
250<\/td>\n16.6.3 Methods for object copy control
16.6.4 Methods for copier usage <\/td>\n<\/tr>\n
251<\/td>\n17. Register layer
17.1 Overview
17.2 Global declarations
17.2.1 Types <\/td>\n<\/tr>\n
252<\/td>\n17.2.2 Enumerations <\/td>\n<\/tr>\n
254<\/td>\n17.2.3 uvm_hdl_path_concat <\/td>\n<\/tr>\n
255<\/td>\n18. Register model
18.1 uvm_reg_block
18.1.1 Class declaration
18.1.2 Methods <\/td>\n<\/tr>\n
258<\/td>\n18.1.3 Introspection <\/td>\n<\/tr>\n
261<\/td>\n18.1.4 Coverage <\/td>\n<\/tr>\n
263<\/td>\n18.1.5 Access <\/td>\n<\/tr>\n
265<\/td>\n18.1.6 Back door <\/td>\n<\/tr>\n
267<\/td>\n18.2 uvm_reg_map
18.2.1 Class declaration <\/td>\n<\/tr>\n
268<\/td>\n18.2.2 Common methods
18.2.3 Methods <\/td>\n<\/tr>\n
271<\/td>\n18.2.4 Introspection <\/td>\n<\/tr>\n
274<\/td>\n18.2.5 Bus access <\/td>\n<\/tr>\n
275<\/td>\n18.3 uvm_reg_file
18.3.1 Class declaration
18.3.2 Methods <\/td>\n<\/tr>\n
276<\/td>\n18.3.3 Introspection
18.3.4 Back door <\/td>\n<\/tr>\n
277<\/td>\n18.4 uvm_reg
18.4.1 Class declaration <\/td>\n<\/tr>\n
278<\/td>\n18.4.2 Methods <\/td>\n<\/tr>\n
279<\/td>\n18.4.3 Introspection <\/td>\n<\/tr>\n
281<\/td>\n18.4.4 Access <\/td>\n<\/tr>\n
288<\/td>\n18.4.5 Front door
18.4.6 Back door <\/td>\n<\/tr>\n
291<\/td>\n18.4.7 Coverage <\/td>\n<\/tr>\n
293<\/td>\n18.4.8 Callbacks <\/td>\n<\/tr>\n
294<\/td>\n18.5 uvm_reg_field
18.5.1 Class declaration
18.5.2 Member variables <\/td>\n<\/tr>\n
295<\/td>\n18.5.3 Methods
18.5.4 Introspection <\/td>\n<\/tr>\n
298<\/td>\n18.5.5 Access <\/td>\n<\/tr>\n
304<\/td>\n18.5.6 Callbacks <\/td>\n<\/tr>\n
305<\/td>\n18.6 uvm_mem
18.6.1 Class declaration <\/td>\n<\/tr>\n
306<\/td>\n18.6.2 Variables
18.6.3 Methods <\/td>\n<\/tr>\n
307<\/td>\n18.6.4 Introspection <\/td>\n<\/tr>\n
310<\/td>\n18.6.5 HDL access <\/td>\n<\/tr>\n
313<\/td>\n18.6.6 Front door <\/td>\n<\/tr>\n
314<\/td>\n18.6.7 Back door <\/td>\n<\/tr>\n
316<\/td>\n18.6.8 Coverage <\/td>\n<\/tr>\n
318<\/td>\n18.6.9 Callbacks <\/td>\n<\/tr>\n
319<\/td>\n18.7 uvm_reg_indirect_data
18.7.1 Class declaration
18.7.2 Methods
18.8 uvm_reg_fifo <\/td>\n<\/tr>\n
320<\/td>\n18.8.1 Class declaration
18.8.2 Common variables
18.8.3 Methods
18.8.4 Introspection <\/td>\n<\/tr>\n
321<\/td>\n18.8.5 Access <\/td>\n<\/tr>\n
323<\/td>\n18.9 uvm_vreg
18.9.1 Class declaration <\/td>\n<\/tr>\n
331<\/td>\n18.9.2 uvm_vreg_cbs <\/td>\n<\/tr>\n
332<\/td>\n18.10 uvm_vreg_field <\/td>\n<\/tr>\n
333<\/td>\n18.10.1 Class declaration
18.10.2 Methods
18.10.3 Introspection <\/td>\n<\/tr>\n
334<\/td>\n18.10.4 HDL access <\/td>\n<\/tr>\n
335<\/td>\n18.10.5 Callbacks <\/td>\n<\/tr>\n
337<\/td>\n18.10.6 uvm_vreg_field_cbs <\/td>\n<\/tr>\n
338<\/td>\n18.11 uvm_reg_cbs
18.11.1 Class declaration
18.11.2 Methods <\/td>\n<\/tr>\n
341<\/td>\n18.11.3 Types
18.11.4 uvm_reg_read_only_cbs <\/td>\n<\/tr>\n
342<\/td>\n18.11.5 uvm_reg_write_only_cbs <\/td>\n<\/tr>\n
343<\/td>\n18.12 uvm_mem_mam
18.12.1 Class declaration
18.12.2 Types
18.12.3 Variables <\/td>\n<\/tr>\n
344<\/td>\n18.12.4 Methods
18.12.5 Memory management <\/td>\n<\/tr>\n
345<\/td>\n18.12.6 Introspection <\/td>\n<\/tr>\n
346<\/td>\n18.12.7 uvm_mem_region <\/td>\n<\/tr>\n
349<\/td>\n18.12.8 uvm_mem_mam_policy <\/td>\n<\/tr>\n
350<\/td>\n18.12.9 uvm_mem_mam_cfg <\/td>\n<\/tr>\n
351<\/td>\n19. Register layer interaction with the design
19.1 Generic register operation descriptors
19.1.1 uvm_reg_item <\/td>\n<\/tr>\n
354<\/td>\n19.1.2 uvm_reg_bus_op <\/td>\n<\/tr>\n
356<\/td>\n19.2 Classes for adapting between register and bus operations
19.2.1 uvm_reg_adapter <\/td>\n<\/tr>\n
357<\/td>\n19.2.2 uvm_reg_tlm_adapter
19.3 uvm_reg_predictor <\/td>\n<\/tr>\n
358<\/td>\n19.3.1 Class declaration
19.3.2 Variables <\/td>\n<\/tr>\n
359<\/td>\n19.3.3 Methods
19.4 Register sequence classes
19.4.1 uvm_reg_sequence <\/td>\n<\/tr>\n
366<\/td>\n19.4.2 uvm_reg_frontdoor <\/td>\n<\/tr>\n
367<\/td>\n19.5 uvm_reg_backdoor
19.5.1 Class declaration
19.5.2 Methods <\/td>\n<\/tr>\n
369<\/td>\n19.6 UVM HDL backdoor access support routines
19.6.1 Variables
19.6.2 Methods <\/td>\n<\/tr>\n
371<\/td>\nAnnex A (informative) Bibliography <\/td>\n<\/tr>\n
372<\/td>\nAnnex B (normative) Macros and defines
B.1 Report macros <\/td>\n<\/tr>\n
373<\/td>\nB.2 Utility and field macros for components and objects <\/td>\n<\/tr>\n
388<\/td>\nB.3 Sequence-related macros <\/td>\n<\/tr>\n
389<\/td>\nB.4 Callback macros <\/td>\n<\/tr>\n
391<\/td>\nB.5 UVM TLM implementation port declaration macros <\/td>\n<\/tr>\n
394<\/td>\nB.6 Size defines <\/td>\n<\/tr>\n
395<\/td>\nB.7 UVM version globals <\/td>\n<\/tr>\n
396<\/td>\nAnnex C (normative) Configuration and resource classes
C.1 Overview
C.2 Resources <\/td>\n<\/tr>\n
405<\/td>\nC.3 UVM resource database <\/td>\n<\/tr>\n
408<\/td>\nC.4 UVM configuration database <\/td>\n<\/tr>\n
411<\/td>\nAnnex D (normative) Convenience classes, interface, and methods
D.1 uvm_callback_iter <\/td>\n<\/tr>\n
412<\/td>\nD.2 Component interfaces <\/td>\n<\/tr>\n
416<\/td>\nD.3 uvm_reg_block access methods <\/td>\n<\/tr>\n
418<\/td>\nD.4 Callback typedefs <\/td>\n<\/tr>\n
420<\/td>\nAnnex E (normative) Test sequences
E.1 uvm_reg_hw_reset_seq
E.2 Bit bashing test sequences <\/td>\n<\/tr>\n
422<\/td>\nE.3 Register access test sequences <\/td>\n<\/tr>\n
424<\/td>\nE.4 Shared register and memory access test sequences <\/td>\n<\/tr>\n
426<\/td>\nE.5 Memory access test sequences <\/td>\n<\/tr>\n
427<\/td>\nE.6 Memory walking-ones test sequences <\/td>\n<\/tr>\n
429<\/td>\nE.7 uvm_reg_mem_hdl_paths_seq
E.8 uvm_reg_mem_built_in_seq <\/td>\n<\/tr>\n
431<\/td>\nAnnex F (normative) Package scope functionality
F.1 Overview
F.2 Types and enumerations <\/td>\n<\/tr>\n
438<\/td>\nF.3 Methods and types <\/td>\n<\/tr>\n
442<\/td>\nF.4 Core service <\/td>\n<\/tr>\n
446<\/td>\nF.5 Traversal <\/td>\n<\/tr>\n
449<\/td>\nF.6 uvm_run_test_callback <\/td>\n<\/tr>\n
450<\/td>\nF.7 uvm_root <\/td>\n<\/tr>\n
454<\/td>\nAnnex G (normative) Command line arguments
G.1 Command line processing <\/td>\n<\/tr>\n
456<\/td>\nG.2 Built-in UVM-aware command line arguments <\/td>\n<\/tr>\n
459<\/td>\nAnnex H (normative) Deprecation
H.1 General
H.2 Constructs that have been deprecated <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

System Verilog – Universal Verification Methodology Language Reference Manual<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2023<\/td>\n462<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":446797,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[381,2641],"product_tag":[],"class_list":{"0":"post-446789","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-25-040-01","7":"product_cat-bsi","9":"first","10":"instock","11":"sold-individually","12":"shipping-taxable","13":"purchasable","14":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/446789","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/446797"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=446789"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=446789"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=446789"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}